Wednesday, July 24, 2024

RISC-V International Ratifies 40 Specifications in Two Years, Driving Adoption and Innovation

RISC-V International, the global standards organization, announced the ratification of 40 new technical specifications in the past two years. These specs, primarily focusing on efficiency, vector, and virtualization, further establish the RISC-V instruction set architecture (ISA) as a leading choice for various markets, including aerospace, AI/ML, automotive, data center, embedded, HPC, and security.

The newly ratified specifications enable the growth and adoption of RISC-V implementations worldwide, with more than 13 billion RISC-V cores already in the market. Key specifications include:

  • Efficiency: bitmanip, Zc*, Zfa
  • Virtualization: hypervisor, aia, iommu
  • Vector: vector, vector crypto, FP16, BF16

RISC-V International’s diverse membership base, spanning North America, Europe, and APAC, ensures broad global adoption and participation. The collective efforts of over 4,200 members contribute to the advancement of the RISC-V ISA.

In 2024, RISC-V anticipates the ratification of its Profile family and the ecosystem’s first Platform, delivering increased portability in software design. The open collaboration and dedication of the RISC-V community continue to drive innovation and adoption across industries.